1. Technical Field of the Invention
The present invention relates to an improved transceiver providing high-speed transmission signal using shared resources and reduced area.
2. Description of Related Art
With the advancement of CMOS technology, device sizes have decreased to achieve higher processing speed. High-speed differential signaling systems have been developed to minimize cross talk and capacitive coupling problems. It has also become increasingly difficult to interface core devices operating at a lower voltage to the Input/Output devices operating at a higher voltage. As the core is shrinking, size of the chip is going to be limited by the Input/Output circuit.
To ensure noise free signaling, conventional high-speed signaling systems use voltage translator and current driver circuits, to be coupled to the receiver to enable the system as a transmitter and receiver, better known as transceiver. FIG. 1 illustrates a prior art transceiver circuit. The transceiver circuit consists of translators T1 and T2 for providing translated data fed with inputs I and EN respectively, where I is the low voltage input signal to be translated and EN is the signal for enabling the driver D to transfer the signal to the OUT pad for transmission. Here EN and I are the signals coming from the core. Receiver R is a configuration to receive IN and REF as inputs and output CIN signal that goes to the core, thus enabling reception.
The above said elements are coupled as discrete devices to perform as a signaling system with a drawback of the system being that as the size of the core is scaled down, translation of signals and area creates a bottleneck for overall system performance.
Therefore, a need exists to provide a scheme to integrate the transceiver, voltage translator, and driver circuits as a single device by sharing current and voltage resources of transmitter and receiver. The present invention provides such a scheme.
There is also a need to obviate the shortcomings of the prior art by providing a transceiver using differential amplifier architecture occupying minimum area by resource sharing of transmitter and receiver.
There is also a need to provide a transceiver which can operate to implement high-speed signaling.
There is further a need to provide a low voltage differential signaling I/O buffer with efficient resource sharing by coupling two transceivers configured to produce complementary outputs.
There is further a need to provide a transceiver occupying minimum area by resource sharing of the transmitter and receiver.